SY100ELT23 Datasheet | Synergy

.. SEMICONDUCTOR SYNERGY DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR ClockWorks™ SY10ELT23 ClockWorks™ SY100ELT23 SY10ELT23 SY100ELT23 Features s s s s s s s 3.0ns typical propagation delay <500ps typical output-to-output skew Differential PECL outputs 24mA TTL outputs Flow-through pinouts ESD protection of 2000V Available in 8-pin SOIC package DESCRIPTION The SY10/100ELT23 are dual differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the ELT23 makes it ideal for applications which require the tranlation of a clock and a data...