p-channel vertical dmos fet.
* High Input Impedance and High Gain
* Low-Power Drive Requirement
* Ease of Paralleling
* Low CISS and Fast Switching Speeds
* Excellent Thermal Stab.
* Logic-Level Interfaces (Ideal for TTL and CMOS)
* Solid-State Relays
* Analog Switches
* Power Managem.
The TP2104 low-threshold, Enhancement-mode (normally-off) transistor uses a vertical DMOS structure and a well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors a.
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