ZL30281
Key Features
- 25 MHz Crystal or CMOS Input
- Generates PCIe 1, 2, 3, 4, 5, 6 Jitter-compliant Clocks with CML Outputs
- Four Default Configurations Selected by Hardware Pins at Reset
- Config0: 100 MHz on Output OC1 (CML)
- Config2: 100 MHz on OC1 (CML), OC2 (HSTL)
- Config3: 100 MHz on OC1, OC2 (CML) and 25 MHz LVCMOS on OC3
- Per-Output Controls (Using SPI or I2C Interface)
- Per-Output Enable/Disable and Glitchless Start/Stop (Stop High or Low)
- Precise Output Alignment Circuitry and PerOutput Phase Adjustment
- SPI or I2C Processor Interface
