Full PDF Text Transcription for LS3550C (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
LS3550C. For precise diagrams, and layout, please refer to the original PDF.
LS3550C MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550C is a monolithic pair of PNP transistors mounted in a single P-DIP package...
View more extracted text
a monolithic pair of PNP transistors mounted in a single P-DIP package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching. The 8 Pin P-DIP provides ease of manufacturing, and the symmetrical pinout prevents improper orientation. (See Packaging Information).
LS3550C Datasheet
