PDSP16318A Datasheet - Mitel Networks Corporation

PDSP16256GC1R

PDSP16318A Features

* s s s s s s s s s s s s s s Full 20MHz Throughout in FFT Applications Four Independent 16-bit I/O Ports 20-bit Addition or Accumulation Fully Compatible with PDSP16112 Complex Multiplier On Chip Shift Structures for Result Scaling Overflow Detection Independent Three-State Outputs and Clock Enable

PDSP16318A General Description

The PDSP16318 is a Dual 20-bit Adder/Subtractor configured to support Complex Arithmetic. The device may be used with each of the adders allocated to real or imaginary data (e.g. Complex Conjugation), the entire device allocated to Real or Imaginary Data (e.g. Radix 2 Butterflys) or each of the adde.

PDSP16318A Datasheet (88.71 KB)

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PDSP16318A

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Mitel Networks Corporation

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88.71 KB

Description:

Pdsp16256gc1r.
PDSP16318/16318A PDSP16318/PDSP16318A Complex Accumulator Advance Information Supersedes version DS3708 - 2.4 September 1996 DS3708 - 3.1 November 19.

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PDSP16318A PDSP16256GC1R Mitel Networks Corporation

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PDSP16318A Features

PDSP16318A General Description

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