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M5M5Y5636TG-20 Datasheet - Mitsubishi

M5M5Y5636TG-20 18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM

The M5M5Y5636TG is a family of 18M bit synchronous SRAMs organized as 524288-words by 36-bit. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Mitsubishi's SRAMs are fabricated with high performance, low power CMOS technology, pro.

M5M5Y5636TG-20 Features

* Fully registered inputs and outputs for pipelined operation

* Fast clock speed: 250, 225, and 200 MHz

* Fast access time: 2.6, 2.8, 3.2 ns

* Single 1.8V +150/-100mV power supply VDD

* Separate VDDQ for 1.8V I/O

* Individual byte write (BWa# - BWd#) c

M5M5Y5636TG-20_MitsubishiElectricSemiconductor.pdf