M5M5Y5636TG-25 sram equivalent, 18874368-bit(524288-word by 36-bit) network sram.
* Fully registered inputs and outputs for pipelined operation
* Fast clock speed: 250, 225, and 200 MHz
* Fast access time: 2.6, 2.8, 3.2 ns
* Single 1.8V.
The sense of two User-Programmable Chip Enable inputs (E2, E3), whether they function as active LOW or active HIGH inpu.
The M5M5Y5636TG is a family of 18M bit synchronous SRAMs organized as 524288-words by 36-bit. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Mitsubishi's SRAMs are fabricated wit.
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