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M65667SP - PICTURE-IN-PICTURE SIGNAL PROCESSING

Description

The M65667SP is a NTSC PIP (Picture in Picture) signal processing LSI, whose sub and main-picture inputs are composite and Y/C separated signals, respectively.

The built-in field memory (96k-bit RAM) ,V-chip data slicer and analog circuitries lead the PIP system low cost and small size.

Features

  • BIAS AVdd3 (vcxo) AVdd2 (m) Vin (m) Vrt (m) Vrb (m) AVss2 (m) AVdd1 (s) Vin (s) Vrt (s) Vrb (s) AVss1 (s) RESET DVss1 DVdd1 BGP(s)/TEST0.
  • Built-in 96k-bit field memory (sub-picture data storage) Internal V-chip data slicer (for sub-picture) Pin compatible with M65617SP Vertical filter for sub-picture (Y signal ) Single sub-picture (selectable picture size : 1/9 , 1/16) Sub-picture processing sepecification (1/9 size / 1/16 size) : Quanti.

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Datasheet Details

Part number M65667SP
Manufacturer Mitsubishi
File Size 53.78 KB
Description PICTURE-IN-PICTURE SIGNAL PROCESSING
Datasheet download datasheet M65667SP Datasheet
Additional preview pages of the M65667SP datasheet.

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Full PDF Text Transcription

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MITSUBISHI ICs (TV) PRELIMINARY Notice:This is not a final specification. Some parametric limits are subject to change. M65667SP PICTURE-IN-PICTURE SIGNAL PROCESSING DESCRIPTION The M65667SP is a NTSC PIP (Picture in Picture) signal processing LSI, whose sub and main-picture inputs are composite and Y/C separated signals, respectively. The built-in field memory (96k-bit RAM) ,V-chip data slicer and analog circuitries lead the PIP system low cost and small size.
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