16-bit hybrid controller.
1.1.1
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Digital Signal Processing Core
Efficient 16-bit 56800 family hybrid controller engine with dual Harvard architecture As many as 40 Mi.
ecific Memory & Peripherals
IPBus Bridge (IPBB)
External Bus Interface Unit
External Address Bus Switch External Data.
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Four General Purpose Quad Timers: Timer A (sharing pins with Quad Dec0), Timers B &C without external pins and Timer D with two pins CAN 2.0 B module with 2-pin ports for transmit and receive Se.
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