74LS112A, 74LS112 - DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

Motorola

Datasheet Details

Part number	74LS112A, 74LS112
Manufacturer	Motorola
File Size	147.34 KB
Description	DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
Datasheet	74LS112_MotorolaInc.pdf
Note	This datasheet PDF includes multiple part numbers: 74LS112A, 74LS112. Please refer to the document for exact specifications by model.

individual J, K, clock, and asynchronous set and clear inputs to each flip-flop. When the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the truth table as long as minimum set-up and hold time are observed. Input data is transferred to the outputs on the negative-going edge of the clock pulse. SN54/74LS112A DUAL JK.

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Published: Jan 7, 2017 |