MCM72FB8ML module equivalent, 256k x 72 bit burst ram multichip module.
1 0 1 0 1 0 1 0 X X X X X DQx High
–Z High
–Z High
–Z High
–Z High
–Z High
–Z H.
Synchronous design allows precise cycle control with the use of an external clock (K). BiCMOS circuitry reduces the ove.
Pin Locations E10 Symbol ADSC Type Input Description Synchronous Address Status Controller: Active low, interrupts any ongoing burst and latches a new external address. Used to initiate READ, WRITE, or chip deselect cycle. Synchronous Address Status.
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