MTV012E Datasheet | Myson

FEATURES 8051 core. 256 bytes internal RAM. 8K bytes program EPROM. 14 channels 12V open drain PWM DAC, 10 dedicated channels and 4 channels shared with I/O pin. 20 bi-direction I/O pin, 12 dedicated pin, 4 shared with DAC, 4 shared with DDC/IIC interface. 3 output pin shared with H/V sync output and self test output pins. SYNC processor for posite separation, polarity and frequency check, and polarity adjust. Built-in monitor self test pattern generator. Built-in Low Power Reset circuit. IIC interface for DDC1/DDC2B and EEPROM, only one EEPROM needed to store DDC1/DDC2B and display mode information. Watch dog timer with programmable interval. 40 pin PDIP package. GENERAL DESCRIPTION The MTV012E micro-controller is an 8051 CPU core-embedded device specially tailored to CRT monitor applications. It includes an 8051 CPU core, 256-byte SRAM, 14 built-in PWM DACs, DDC1/DDC2B interface, 24Cxx series EEPROM interface and an 8K-byte internal program EPROM. BLOCK DIAGRAM STOUT P1.0-7 X1 P0.0-7 RD WR P0.0-7 RD WR HSYNC H/VSYNC CONTROL VSYNC HBLANK VBLANK X2 8051 CORE INT1 WATCH-DOG TIMER P2.0-3 P3.0-P3.2 14 CHANNEL PWM DAC DA0-9 DA10-13 P3.4 P2.4-7 HSCL HSDA DDC 1/2 B & FIFO INTERFACE ISCL IIC INTERFACE ISDA This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent acpany the sale of the product. MTV012E Revision 1.2 12/23/1998 1/14 MYSON TECHNOLOGY 1.0 PIN CONNECTION P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST HSCL/P3.0/Rxd HSDA/P3.1/Txd ISDA/P3.2/INT0 HSYNC ISCL/P3.4/T0 VSYNC HBLANK/P4.1 VBLANK/P4.0 X2 X1 VSS VDD DA0 DA1 DA2 DA3 DA4 DA5 DA6 DA7 DA8 DA9 STOUT/P4.2 DA10/P2.7 DA11/P2.6 DA12/P2.5 DA13/P2.4 P2.3 P2.2 P2.1 P2.0/INT0 2.0 PIN DESCRIPTION Name P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST HSCL/P3.0/Rxd HSDA/P3.1/Txd ISDA/P3.2/INT0 HSYNC...