D45128163G5 Datasheet - NEC

UPD45128163G5

D45128163G5 Features

* Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge

* Pulsed interface

* Possible to assert random column address in every cycle

* Quad internal banks controlled by BA0(A13) and BA1(A12)

* Byte control (×16) by LDQM and UDQM

D45128163G5 General Description

The µPD45128441, 45128841, 45128163 are high-speed 134,217,728-bit synchronous dynamic random-access memories, organized as 8,388,608 × 4 × 4, 4,194,304 × 8 × 4, 2,097,152 × 16 × 4 (word × bit × bank), respectively. The synchronous DRAMs achieved high-speed data transfer using the pipeline architect.

D45128163G5 Datasheet (851.07 KB)

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Part number:

D45128163G5

Manufacturer:

NEC

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851.07 KB

Description:

Upd45128163g5.

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D45128163G5 UPD45128163G5 NEC

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D45128163G5 Features

D45128163G5 General Description

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