Download UPD2149-2 Datasheet PDF
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UPD2149-2 Key Features

  • pletely Static Memory
  • No Clock or Timing Strobe Required
  • Equal Access and Cycle Times, Faster Chip Select Access
  • Single +5V Supply
  • High Density 18-Pin Package
  • Directly TTL patible
  • All Inputs and Outputs
  • mon Input and Output
  • Three-State Output
  • Access Time: 35-55 ns MAX (From Address)

UPD2149-2 Description

Using a scaled NMOS technology, it incorporates an innovative design approach which provides the ease-of-use.