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UPD44164184 - (UPD44164084/184/364) 18M-BIT DDRII SRAM 4-WORD BURST OPERATION

Download the UPD44164184 datasheet PDF. This datasheet also covers the UPD44164084 variant, as both devices belong to the same (upd44164084/184/364) 18m-bit ddrii sram 4-word burst operation family and are provided as variant models within a single manufacturer datasheet.

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Note: The manufacturer provides a single datasheet file (UPD44164084_NEC.pdf) that lists specifications for multiple related part numbers.

General Description

technology using full CMOS six-transistor memory cell.

Overview

DATA SHEET MOS INTEGRATED CIRCUIT µPD44164084, 44164184, 44164364 18M-BIT DDRII SRAM 4-WORD BURST.

Key Features

  • 1.8 ± 0.1 V power supply and HSTL I/O.
  • DLL circuitry for wide output data valid window and future frequency scaling.
  • Pipelined double data rate operation.
  • Common data input/output bus.
  • Four-tick burst for reduced address frequency.
  • Two input clocks (K and /K) for precise DDR timing at clock rising edges only.
  • Two output clocks (C and /C) for precise flight time and clock skew matching-clock and data delivered together to receiving d.