UPD485506 Overview
The µPD485506 is a high speed FIFO (First In First Out) line buffer. Word organization can be changed either 5,048 words by 16 bits or 10,096 words by 8 bits. Its CMOS static circuitry provides high speed access and low power consumption.
UPD485506 Key Features
- 5,048 words by 16 bits (Word mode) /10,096 words by 8 bits (Byte mode)
- Asynchronous read/write operations available
- Power supply voltage VCC = 5.0 V ± 0.5 V
- Suitable for sampling two lines of A3 size paper (16 dots/mm)
- All input/output TTL patible
- 3-state output
- Full static operation; data hold time = infinity