uPD70F3612A Datasheet | NEC

V850ES/FE3-L 32-bit Single-Chip Microcontroller Hardware µPD70F3610(A) µPD70F3610(A1) µPD70F3610(A2) µPD70F3611(A) µPD70F3611(A1) µPD70F3611(A2) µPD70F3612(A) µPD70F3612(A1) µPD70F3612(A2) µPD70F3613(A) µPD70F3613(A1) µPD70F3613(A2) µPD70F3614(A) µPD70F3614(A1) µPD70F3614(A2) Document No. U19190EE1V0DS00 Date Published March 2008 © NEC Electronics 2008 Printed in Germany V850ES/FE3-L Notes for CMOS Devices 1. Precaution against ESD for semiconductors Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is remended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2. Handling of unused input pins for CMOS No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3....