Overview: SSSS7777KKKK1111666613318668UUUU2222MMMM 551122KKxx3366&&11MMxx1188DDDDRRIIII++CCIIOOBBLL22SSRRAAMM 18Mb DDRII+ CIO BL2 SRAM Specification
(2.5 Clock Read Latency)
165FBGA with Pb & Pb Free
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Rev. 1.0 May 2013 -1- S7K1636U2M S7K1618U2M 512Kx36 & 1Mx18 DDRII+ CIO BL2 SRAM Document Title
512Kx36 & 1Mx18 - Bit DDRII+ CIO Burst Length of 2 SRAM (2.5 Clock Read Latency) Revision History Rev. No. History 1.0 Final spec release Draft Date
May 2013 Remark
Final Rev. 1.0 May 2013 -2- S7K1636U2M S7K1618U2M 512Kx36 & 1Mx18 DDRII+ CIO BL2 SRAM 512Kx36 & 1Mx18 - Bit DDRII+ CIO Burst Length of 2 SRAM (2.
