Overview: SSSS7777SSSS3333222231316868UUUU2222MMMM 11MMxx3366&&22MMxx1188QQuuaaddrruuppllee--IIII++BBLL22SSRRAAMM 36Mb Quadruple-II+ BL2 SRAM Specification
(2.5 Clock Read Latency)
165FBGA with Pb & Pb Free
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Rev. 1.1 Jul. 2014 -1- S7S3236U2M S7S3218U2M 1Mx36 & 2Mx18 Quadruple-II+ BL2 SRAM Document Title
1Mx36 & 2Mx18 - Bit Quadruple-II+ Burst Length of 2 SRAM (2.5 Clock Read Latency) Revision History Rev. No. History 0.0 Initial Draft 0.1 Change Thermal Resistance θJA value from 20.8°C/W to 16.3°C/W 1.0 Final spec release Add current spec value Add 366MHz speed binning Remove 4Mx9 organization 1.1 Correct errata on Setup and Hold Time Remove θJB parameter in thermal resistance Draft Date
Feb. 2013 Apr. 2013 Remark
Preliminary Preliminary Oct. 2013 Final Jul. 2014 Final Rev. 1.1 Jul. 2014 -2- S7S3236U2M S7S3218U2M 1Mx36 & 2Mx18 Quadruple-II+ BL2 SRAM 1Mx36 & 2Mx18 - Bit Quadruple-II+ Burst Length of 2 SRAM (2.
