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S7S3218U4M Datasheet 1Mx36 & 2Mx18 & 4Mx9 Quadruple-II+ BL4 SRAM

Manufacturer: NETSOL

Download the S7S3218U4M datasheet PDF. This datasheet also includes the S7S3236U4M variant, as both parts are published together in a single manufacturer document.

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Note: The manufacturer provides a single datasheet file (S7S3236U4M-NETSOL.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number S7S3218U4M
Manufacturer NETSOL
File Size 433.34 KB
Description 1Mx36 & 2Mx18 & 4Mx9 Quadruple-II+ BL4 SRAM
Download S7S3218U4M Download (PDF)

Overview

S7S3236U4M S7S3218U4M S7S3209U4M 11MMxx3366 && 22MMxx1188 && 44MMxx99 QQuuaaddrruuppllee--IIII++ BBLL44 SSRRAAMM 36Mb Quadruple-II+ BL4 SRAM Specification (2.5 Clock Read Latency) 165FBGA with Pb & Pb Free (ROHS Compliant) INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO NETSOL PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE.

NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN NETSOL PRODUCTS OR TECHNOLOGY.

ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.

Key Features

  • 1.8V+0.1V/-0.1V Power Supply.
  • DLL circuitry for wide output data valid window and future fre- quency scaling.
  • I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/ -0.1V for 1.8V I/O.
  • Separate independent read and write data ports with concurrent read and write operation.
  • HSTL I/O.
  • Full data coherency, providing most current data.
  • Synchronous pipeline read with self timed late write.
  • Read latency: 2.5 clock cycle.