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74ABT16823A - 18-bit bus interface D-type flip-flop

General Description

The 74ABT16823A 18-bit bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths

Key Features

  • Two sets of high speed parallel registers with positive edge-triggered D-type flip-flops.
  • Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors.
  • Live insertion/extraction permitted.
  • Power-up 3-State.
  • Power-up Reset.
  • Output capability: +64 mA/.
  • 32 mA.
  • Latch-up protection exceeds 500 mA per Jedec Std 17.
  • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per M.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS 74ABT16823A 18-bit bus interface D-type flip-flop with reset and enable (3-State) Product data Replaces data sheet 74ABT16823A/ABTH16823A of 1998 Feb 27 2004 Feb 02 Philips Semiconductors Philips Semiconductors 18-bit bus-interface D-type flip-flop with reset and enable (3-State) Product data 74ABT16823A FEATURES • Two sets of high speed parallel registers with positive edge-triggered D-type flip-flops • Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors • Live insertion/extraction permitted • Power-up 3-State • Power-up Reset • Output capability: +64 mA/–32 mA • Latch-up protection exceeds 500 mA per Jedec Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model DESCRIPTION The