74ABTH16841A Description
The 74ABT16841A Bus interface latch is designed to provide extra data width for wider data/address paths of buses carrying parity. The 74ABT16841A consists of two sets of ten D-type latches with 3-State outputs. The flip-flops appear transparent to the data when Latch Enable (nLE) is High.
74ABTH16841A Key Features
- High speed parallel latches
- Live insertion/extraction permitted
- Extra data width for wide address/data paths or buses carrying
- Power-up 3-State
- 74ABTH16841A incorporates bus-hold data inputs which
- Power-up reset
- Ideal where high speed, light loading, or increased fan-in are
- Output capability: +64mA/-32mA
- Latch-up protection exceeds 500mA per Jedec Std 17
- ESD protection exceeds 2000V per MIL STD 883 Method 3015