74AHC138
Description
1999 Sep 27 3 Philips Semiconductors Product specification 3-to-8 line decoder/demultiplexer; inverting 74AHC138; 74AHCT138 handbook, halfpage A0 1 A1 2 A2 3 E1 4 E2 5 E3 6 Y7 7 GND 8 MNA369 16 VCC 15 Y0 14 Y1 handbook, halfpage 1 2 3 E1 E2 E3 A0 A1 A2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 MNA370 15 14 13 12 11 10 9 7 138 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6 4 5 6 F.
Key Features
- ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V
- Balanced propagation delays
- All inputs have Schmitt-trigger actions
- Multiple input enable for easy expansion
- Ideal for memory chip select decoding
- Inputs accept voltages higher than VCC
- For AHC only: operates with CMOS input levels
- For AHCT only: operates with TTL input levels
- INPUT E1 H X X L L L L L L L L Note
