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74AHC138 - 3-to-8 line decoder/demultiplexer

Description

The 74AHC/AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard No.

7A.

Features

  • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V.
  • Balanced propagation delays.
  • All inputs have Schmitt-trigger actions.
  • Multiple input enable for easy expansion.
  • Ideal for memory chip select decoding.
  • Inputs accept voltages higher than VCC.
  • For AHC only: operates with CMOS input levels.
  • For AHCT only: operates with TTL input levels.
  • Specified.

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Datasheet preview – 74AHC138

Datasheet Details

Part number 74AHC138
Manufacturer NXP
File Size 84.13 KB
Description 3-to-8 line decoder/demultiplexer
Datasheet download datasheet 74AHC138 Datasheet
Additional preview pages of the 74AHC138 datasheet.

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Full PDF Text Transcription

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INTEGRATED CIRCUITS DATA SHEET 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting Product specification Supersedes data of 1999 Mar 31 File under Integrated Circuits, IC06 1999 Sep 27 Philips Semiconductors Product specification 3-to-8 line decoder/demultiplexer; inverting FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V • Balanced propagation delays • All inputs have Schmitt-trigger actions • Multiple input enable for easy expansion • Ideal for memory chip select decoding • Inputs accept voltages higher than VCC • For AHC only: operates with CMOS input levels • For AHCT only: operates with TTL input levels • Specified from −40 to +85 and +125 °C.
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