74AHCT74 flip-flop equivalent, dual d-type flip-flop.
* ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V
* Balanced propagation delays
* Inputs accepts voltages higher than .
The 74AHC/AHCT74 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT74 dual positive-edge triggered, D-type flip-flops with indivi.
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