74LVC1GX04 Datasheet | NXP Semiconductors

FEATURES - Wide supply voltage range from 1.65 to 5.5 V - 5 V tolerant input and a 5 V overvoltage tolerant powered down output. - High noise immunity - plies with JEDEC standard: - JESD8-7 (1.65 to 1.95 V) - JESD8-5 (2.3 to 2.7 V) - JESD8B/JESD36 (2.7 to 3.6 V). - ±24 m A output drive (VCC = 3.0 V) - CMOS low power consumption - Latch-up performance exceeds 250 m A - Direct interface with TTL levels - SOT363 and SOT457 package - ESD protection: - HBM EIA/JESD22-A114-A exceeds 2000 V - MM EIA/JESD22-A115-A exceeds 200 V. - Specified from - 40 to +85 °C and - 40 to +125 °C. DESCRIPTION The 74LVC1GX04 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS patible TTL families. Inputs can be driven from either 3.3 or 5 V devices. This feature allows the use of this device as translator in a mixed 3.3 and 5 V environment. This device is fully specified for partial power-down applications using Ioff at output Y. The Ioff circuitry disables the output Y, preventing the damaging backflow current through the device when it is powered down. The 74LVC1GX04 bines the functions of the 74LVC1GU04 and 74LVC1G04 to provide a device optimized for use in crystal oscillator applications. The integration of the two devices into the 74LVC1GX04 produces the benefits of a pact footprint, lower power dissipation and stable operation over a wide range of frequency and temperature. 2003 Aug 13 Philips Semiconductors Product specification X-tal driver QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C. SYMBOL t PHL/t PLH PARAMETER propagation delay input X1 to output X2 CONDITIONS VCC = 1.8 V; CL = 30 p F; RL = 1 kΩ VCC = 2.5 V; CL = 30 p F; RL = 500 Ω VCC = 2.7 V; CL = 50 p F; RL = 500 Ω VCC = 3.3 V; CL = 50 p F; RL = 500 Ω VCC = 5.0 V; CL = 50 p F; RL = 500 Ω propagation delay input X1 to output Y VCC = 1.8 V; CL = 30 p F; RL = 1 kΩ VCC = 2.5 V; CL = 30 p F; RL = 500 Ω VCC = 2.7 V; CL = 50 p F; RL = 500 Ω VCC = 3.3 V; CL = 50 p F; RL = 500 Ω...