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NXP Semiconductors Electronic Components Datasheet

74LVT125 Datasheet

3.3V Quad buffer 3-State

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74LVT125 pdf
74LVT125; 74LVTH125
3.3 V quad buffer; 3-state
Rev. 7 — 31 May 2016
Product data sheet
1. General description
The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC
operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high
output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving
bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each
controlling one of the 3-state outputs.
2. Features and benefits
Quad bus interface
3-state buffers
Output capability: +64 mA and 32 mA
TTL input and output switching levels
Input and output interface capability to systems at 5 V supply
Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
Live insertion and extraction permitted
No bus current loading when output is tied to 5 V bus
Power-up 3-state
Latch-up protection:
JESD78: exceeds 500 mA
ESD protection:
MIL STD 883 method 3015: exceeds 2000 V
Machine model: exceeds 200 V


NXP Semiconductors Electronic Components Datasheet

74LVT125 Datasheet

3.3V Quad buffer 3-State

No Preview Available !

74LVT125 pdf
Nexperia
74LVT125; 74LVTH125
3.3 V quad buffer; 3-state
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
74LVT125D
40 C to +85 C SO14
74LVTH125D
74LVT125DB 40 C to +85 C SSOP14
74LVTH125DB
74LVT125PW 40 C to +85 C TSSOP14
74LVTH125PW
74LVT125BQ 40 C to +85 C DHVQFN14
74LVTH125BQ
Description
plastic small outline package; 14 leads;
body width 3.9 mm
Version
SOT108-1
plastic shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
plastic dual in-line compatible thermal enhanced very SOT762-1
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
4. Functional diagram
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PQD
Fig 1. Logic symbol

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PQD
Fig 2. IEC logic symbol
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Q2(
PQD
Fig 3. Logic diagram (one buffer)
74LVT_LVTH125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 31 May 2016
© Nexperia B.V. 2017. All rights reserved
2 of 16


Part Number 74LVT125
Description 3.3V Quad buffer 3-State
Maker NXP
Total Page 16 Pages
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