74LVT652 Datasheet | NXP Semiconductors

INTEGRATED CIRCUITS 74LVT652 3.3V Octal transceiver/register, non-inverting (3-State) Product specification Supersedes data of 1994 May 20 IC23 Data Handbook 1998 Feb 19 Philips Semiconductors Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) Features - Independent registers for A and B buses - Multiplexed real-time and stored data - 3-State outputs - Output capability: +64m A/- 32m A - TTL input and output switching levels - Input and output interface capability to systems at 5V supply - Bus-hold data inputs eliminate the need for external pull-up - Live insertion/extraction permitted - No bus current loading when output is tied to 5V bus - Power-up 3-State - Power-up reset - Latch- up protection exceeds 500m A per JEDEC Std 17 - ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model resistors to hold unused inputs DESCRIPTION The LVT652 is a high-performance Bi CMOS product designed for VCC operation at 3.3V. This device bines low static and dynamic power dissipation with high speed and high output drive. The 74LVT652 transceiver/register consists of bus transceiver circuits with 3-State outputs, D- type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (OEAB, OEBA) and Select (SAB, SBA) pins are provided for bus management. QUICK REFERENCE DATA SYMBOL t PLH t PHL CIN CI/O ICCZ PARAMETER Propagation delay An to Bn or Bn to An Input capacitance I/O capacitance Total supply current CONDITIONS Tamb = 25°C; GND = 0V CL = 50p F; VCC = 3.3V VI = 0V or 3V Outputs disabled; VI/O = 0V or 3V Outputs disabled; VCC = 3.6V TYPICAL 2.8 2.6 4 10 0.13 UNIT ns p F p F m A ORDERING INFORMATION PACKAGES 24-Pin Plastic SOL 24-Pin Plastic SSOP Type II 24-Pin Plastic TSSOP Type I TEMPERATURE RANGE -...