74HC595 Overview
74HC595 8−Bit Serial−Input/Serial or Parallel−Output Shift Register with Latched 3−State Outputs High−Performance Silicon−Gate CMOS The 74HC595 consists of an 8−bit shift register and an 8−bit D−type latch with three−state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8−bit latch.
74HC595 Key Features
- Output Drive Capability: 15 LSTTL Loads
- Outputs Directly Interface to CMOS, NMOS, and TTL
- Operating Voltage Range: 2.0 to 6.0 V
- Low Input Current: 1.0 mA
- High Noise Immunity Characteristic of CMOS Devices
- In pliance with the Requirements Defined by JEDEC
- ESD Performance: HBM > 2000 V; Machine Model > 200 V
- Chip plexity: 328 FETs or 82 Equivalent Gates
- Improvements over HC595
- Improved Propagation Delays
