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JN5148-J01 - IEEE802.15.4 Wireless Microcontroller

Datasheet Summary

Description

2.2.1 Power Supplies 2.2.2 Reset 2.2.3 32MHz Oscillator 2.2.4 Radio 2.2.5 Analogue Peripherals 2.2.6 Digital Input/Output 3 CPU 4 Memory Organisation 4.1 ROM 4.2 RAM 4.3 OTP eFuse Memory 4.4 External Memory 4.4.1 External Memory Encryption 4.5 Peripherals 4.6 Unused Memory Addresses 5 System Clocks

Features

  • an enhanced 32-bit RISC processor offering high coding efficiency through variable width instructions, a multi-stage instruction pipeline and low power operation with programmable clock speeds. It also includes a 2.4GHz IEEE802.15.4 compliant transceiver, 128kB of ROM, 128kB of RAM, and a rich mix of analogue and digital peripherals. The large memory footprint allows the device to run both a network stack (e. g. JenNet-IP) and an embedded.

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Datasheet Details

Part number JN5148-J01
Manufacturer NXP
File Size 888.95 KB
Description IEEE802.15.4 Wireless Microcontroller
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Full PDF Text Transcription

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Data Sheet: JN5148-J01 IEEE802.15.4 Wireless Microcontroller Overview The JN5148-J01 is an ultra low power, high performance wireless microcontroller targeted at JenNet and JenNet-IP networking applications. The device features an enhanced 32-bit RISC processor offering high coding efficiency through variable width instructions, a multi-stage instruction pipeline and low power operation with programmable clock speeds. It also includes a 2.4GHz IEEE802.15.4 compliant transceiver, 128kB of ROM, 128kB of RAM, and a rich mix of analogue and digital peripherals. The large memory footprint allows the device to run both a network stack (e.g. JenNet-IP) and an embedded application or in a coprocessor mode. The operating current is below 18mA, allowing operation direct from a coin cell.
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