JN5148-J01 Datasheet | NXP Semiconductors

Data Sheet: JN5148-J01 IEEE802.15.4 Wireless Microcontroller Overview The JN5148-J01 is an ultra low power, high performance wireless microcontroller targeted at Jen Net and Jen Net-IP networking applications. The device Features an enhanced 32-bit RISC processor offering high coding efficiency through variable width instructions, a multi-stage instruction pipeline and low power operation with programmable clock speeds. It also includes a 2.4GHz IEEE802.15.4 pliant transceiver, 128k B of ROM, 128k B of RAM, and a rich mix of analogue and digital peripherals. The large memory footprint allows the device to run both a network stack (e.g. Jen Net-IP) and an embedded application or in a coprocessor mode. The operating current is below 18m A, allowing operation direct from a coin cell. Enhanced peripherals include low power pulse counters running in sleep mode designed for pulse counting in AMR applications and a unique Time of Flight ranging engine, allowing accurate location services to be implemented on wireless sensor networks. It also includes a 4-wire I2S audio interface, to interface directly to mainstream audio CODECs, as well as conventional MCU peripherals. Block Diagram 2.4GHz Radio XTAL Watchdog Timer Power Management Time of Flight Engine O-QPSK Modem RAM ROM 128k B 128k B 32-bit RISC CPU IEEE802.15.4 MAC Accelerator 32-byte OTP e Fuse 128-bit AES Encryption Accelerator 2-Wire Serial Timers UAR Ts 4-Wire Audio Sleep Counters 12-bit ADC, parators 12-bit DACs, Temp Sensor Benefits - Single chip integrates transceiver and microcontroller for wireless sensor networks - Large memory footprint to run Jen Net-IP or Jen Net together with an application - Very low current solution for long battery life - Highly featured 32-bit RISC CPU for high performance and low power - System BOM is low in ponent count and cost - Extensive user...