Datasheet4U Logo Datasheet4U.com

74AUP2G07 Datasheet - NXP Semiconductors

Low-power dual buffer

74AUP2G07 Features

* s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114E Class 3A exceeds 5000

74AUP2G07 General Description

The 74AUP2G07 provides two non-inverting buffers with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. Schmitt-trigger action at all inputs makes the circuit tolerant to .

74AUP2G07 Datasheet (124.67 KB)

Preview of 74AUP2G07 PDF

Datasheet Details

Part number:

74AUP2G07

Manufacturer:

NXP ↗ Semiconductors

File Size:

124.67 KB

Description:

Low-power dual buffer.

📁 Related Datasheet

74AUP2G00 Low-power dual 2-input NAND gate (NXP)

74AUP2G00 DUAL NAND GATE (Diodes)

74AUP2G00 Low-power dual 2-input NAND gate (nexperia)

74AUP2G00-Q100 Low-power dual 2-input NAND gate (nexperia)

74AUP2G02 DUAL NOR GATE (Diodes)

74AUP2G02 Low-power Dual 2-input NOR Gate (NXP)

74AUP2G02 Low-power dual 2-input NOR gate (nexperia)

74AUP2G04 Low-power dual inverter (NXP)

74AUP2G04 DUAL INVERTERS (Diodes)

74AUP2G04 Low-power dual inverter (nexperia)

TAGS

74AUP2G07 Low-power dual buffer NXP Semiconductors

Image Gallery

74AUP2G07 Datasheet Preview Page 2 74AUP2G07 Datasheet Preview Page 3

74AUP2G07 Distributor