74AUP2G07 - DUAL BUFFERS

Product Overview

Diodes

Part number	74AUP2G07
Manufacturer	DIODES
File Size	449.21 KB
Description	DUAL BUFFERS
Datasheet	74AUP2G07 Datasheet
Additional preview pages of the 74AUP2G07 datasheet.

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

The 74AUP2G07 is composed of two buffers with open drain outputs designed for operation over a power supply range of 0.8V to 3.6V.

Advanced Ultra Low Power (AUP) CMOS.
Supply Voltage Range from 0.8V to 3.6V.
-4mA Output Drive at 3.0V.
Low Static Power Consumption.
ICC < 0.9µA.
Low Dynamic Power Consumption.
CPD = 1.2pF Typical at 3.6V.
Schmitt Trigger Action at All Inputs Make the Circuit Tolerant for Slower Input Rise and Fall Time. The Hysteresis is Typically 250mV at VCC = 3.0V.
IOFF Supports Partial-Power-Down Mode Operation.
ESD Protection per JESD 22.
Exceeds 200.

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Published: Jul 26, 2015 |