| Part Number | 74AUP2G07 Datasheet |
|---|---|
| Manufacturer | NXP Semiconductors |
| Overview | The 74AUP2G07 provides two non-inverting buffers with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or . s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114E Class 3A exceeds 5000. |
74AUP2G07 Datasheet and Specifications PDF
The 74AUP2G07 is a Low-power dual buffer.
| Part Number | 74AUP2G07 Datasheet |
|---|---|
| Description | Low-power dual buffer |
| Manufacturer | Nexperia |
| Overview |
The 74AUP2G07 is a dual buffer with open-drain outputs. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dyn.
and benefits
* Wide supply voltage range from 0.8 V to 3.6 V * CMOS low power dissipation * High noise immunity * Overvoltage tolerant inputs to 3.6 V * Low noise overshoot and undershoot < 10 % of VCC * IOFF circuitry provides partial Power-down mode operation * Latch-up performance exceeds 100 mA . |
| Part Number | 74AUP2G07 Datasheet |
|---|---|
| Description | DUAL BUFFERS |
| Manufacturer | Diodes Incorporated |
| Overview |
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.
The 74AUP2G07 is composed of two buffers with open drain outputs desi.
* Advanced Ultra Low Power (AUP) CMOS * Supply Voltage Range from 0.8V to 3.6V * -4mA Output Drive at 3.0V * Low Static Power Consumption * ICC < 0.9µA * Low Dynamic Power Consumption * CPD = 1.2pF Typical at 3.6V * Schmitt Trigger Action at All Inputs Make the Circuit Tolerant for Slower Input Rise. |