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N16T1618D1A Datasheet Preview

N16T1618D1A Datasheet

16M Yltra Low Power CMOS PSRAM

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NanoAmp Solutions, Inc.
1982 Zanker Road, San Jose, CA 95112
ph: 408-573-8878, FAX: 408-573-8877
www.nanoamp.com
N16T1618C2(D1/A1)A
Advance Information
16Mb Ultra-Low Power Asynchronous CMOS PSRAM
1M x 16 bit
Overview
Features
The N16T1618C2(D1/A1)A is an integrated
memory device containing a 16 Mbit Pseudo Static
Random Access Memory using a self-refresh
DRAM array organized as 1,048,576 words by 16
bits. It is designed to be compatible in operation
and interface to standard 6T SRAMS. The device
is designed for low standby and operating current
and includes a power-down feature to
automatically enter standby mode. The device is
available in a 2 CE (chip enable) version and two
ZZ (deep sleep) versions. The ZZ version includes
several power saving modes: a deep sleep mode
where data is not retained in the array and partial
array refresh mode where data is retained in a
portion of the array. Both these modes reduce
standby current drain. The VFBGA package has
separate power rails, VccQ and VssQ for the I/O to
be run from a separate power supply from the
device core.
Product Family
• Dual voltage for Optimum Performance
VCCQ and VSSQ for separate I/O power rails
Vcc - 1.65V to 2.2 V
Vccq - 1.65V to 3.6V
• Fast Cycle Times
TACC < 85 nS
• Very low standby current
ISB < 40µA @ 1.8V
• Very low operating current
Icc < 25mA
• Memory expansion with CE and OE
• Automatic power down mode
• 48-Pin VFBGA, Wafers Available
Part Number
Feature
Package Operating
Power
Type Temperature Supply
Speed
Standby Operating
Current (ISB), Current
Max (Icc), Max
N16T1618C2AZ
N16T1618D1AZ
N16T1618A1AZ
2 CE
Deep Sleep Disabled 48 - BGA
Deep Sleep Active
Pin Configuration
123456
A LB OE
A0
A1
A2
CE2/
ZZ
B I/O8 UB A3 A4 CE1 I/O0
C I/O9 I/O10 A5 A6 I/O1 I/O2
D VSSQ I/O11 A17 A7 I/O3 VCC
E VCCQ I/O12 DNU A16 I/O4 VSS
F I/O14 I/O13 A14 A15 I/O5 I/O6
G I/O15 A19 A12 A13 WE I/O7
H A18 A8
A9 A10 A11 NC
48 Pin BGA (top)
6 x 8 mm
-30oC to +85oC 1.65V - 2.2V 85ns @ 1.65V 40 µA @ 1.8V 3 mA @ 1MHz
Pin Descriptions
Pin Name
A0-A19
WE
CE1
CE2
ZZ
OE
LB
UB
I/O0-I/O15
VCC
VSS
VCCQ
VSSQ
DNU
Pin Function
Address Inputs
Write Enable Input
Chip Enable Input
Chip Enable Input (only for CE2
device)
Deep Sleep Input (only for A1 or D1
deep sleep device)
Output Enable Input
Lower Byte Enable Input
Upper Byte Enable Input
Data Inputs/Outputs
Power
Ground
Power I/O pin only
Ground I/O pin only
Do Not Use (or connect to VSS)
Stock No. 23183 - 04 4/03
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
1




NanoAmp Solutions

N16T1618D1A Datasheet Preview

N16T1618D1A Datasheet

16M Yltra Low Power CMOS PSRAM

No Preview Available !

www.DataSheet4U.com
NanoAmp Solutions, Inc.
Functional Block Diagram
N16T1618C2(D1/A1)A
Advance Information
Address
Inputs
A0 - A19
Address
Decode
Logic
CE1
CE2 1
WE
OE
UB
LB
Control
Logic
Functional Description
1024K x 16
Memory
Array
ZZ 2
Input/
Output
Mux
and
Buffers
I/O0 - I/O7
I/O8 - I/O15
CE1 CE2 1 WE
HXX
XLX
XXX
LHL
L HH
L HH
OE UB/LB ZZ 2
XXH
XXH
XHH
X5 L3
L L3
H L3
H
H
H
I/O3
High Z
High Z
High Z
Data In
Data Out
High Z
MODE
Standby4
Standby4
Standby4
Write5
Read
Active
POWER
Standby
Standby
Standby
Active -> Standby6
Active -> Standby6
Standby6
1.) Only on the two-CE option device.
2. Only on the one-CE option device with sleep mode.
3. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - IO7
are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown. If both UB and LB are in the deselect
mode (high), the chip is in a standby mode regardless of the state of CE1 or CE2.
4. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally
isolated from any external influence and disabled from exerting any influence externally.
5. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
6. The device will consume active power in this mode whenever addresses are changed. Data inputs are internally isolated from any
external influence.
Capacitance1
Item
Symbol
Test Condition
Input Capacitance
I/O Capacitance
CIN VIN = 0V, f = 1 MHz, TA = 25oC
CI/O VIN = 0V, f = 1 MHz, TA = 25oC
1. These parameters are verified in device characterization and are not 100% tested
Min Max Unit
8 pF
8 pF
Stock No. 23183 - 04 4/03
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
2


Part Number N16T1618D1A
Description 16M Yltra Low Power CMOS PSRAM
Maker NanoAmp Solutions
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