NT5CB256M8FN - Industrial and Automotive DDR3(L) 2Gb SDRAM

Nanya

Datasheet Details

Part number	NT5CB256M8FN
Manufacturer	Nanya
File Size	3.26 MB
Description	Industrial and Automotive DDR3(L) 2Gb SDRAM
Datasheet	NT5CB256M8FN-Nanya.pdf

The 2Gb Double-Data-Rate-3 (DDR3(L)) is double data rate architecture to achieve high-speed operation.

JEDEC DDR3 Compliant - 8n Prefetch Architecture - Differential Clock(CK/) and Data Strobe(DQS/) - Double-data rate on DQs, DQS and DM.
Signal Integrity - Configurable DS for system compatibility - Configurable On-Die Termination - ZQ Calibration for DS/ODT impedance accuracy via external ZQ pad (240 ohm ± 1%).
Data Integrity - Auto Self Refresh (ASR) by DRAM built-in TS - Auto Refresh and Self Refresh Modes.
Signal Synchronization - Write Leveling via MR settings - R.

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Published: Sep 4, 2014 |