CAS Latency and Frequency Maximum Operating Frequency (MHz)* DDR333 DDR266B (-6K) * (-75B) 2 133 100 2.5 166 133 * -6K also meets DDR266A Spec (MHz-CL-tRCD-tRP = 133-2-3-.

The 256Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 268,435,456 bits. It is internally configured as a quad-bank DRAM. The DDR SDRAM provides for programmable Read or Write burst lengths of 2, 4, or 8 locations. An Auto .

NT5DS32M8BF

NT5DS32M8BG

NT5DS32M8BS

NT5DS32M8BT

NT5DS32M8AT

NT5DS32M8AW

NT5DS32M8CS

NT5DS32M8CT

NT5DS32M8ES

NT5DS32M16AF

NT5DS32M16BF

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NT5DS32M16BS