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54ACT138 - 1-of-8 Decoder/Demultiplexer

Download the 54ACT138 datasheet PDF. This datasheet also covers the 54AC138 variant, as both devices belong to the same 1-of-8 decoder/demultiplexer family and are provided as variant models within a single manufacturer datasheet.

Description

The ’AC/’ACT138 is a high-speed 1-of-8 decoder/ demultiplexer.

This device is ideally suited for high-speed bipolar memory chip select address decoding.

Features

  • n n n n n n n ICC reduced by 50% Demultiplexing capability Multiple input enable for easy expansion Active LOW mutually exclusive outputs Outputs source/sink 24 mA ’ACT138 has TTL-compatible inputs Standard Microcircuit Drawing (SMD).
  • ’AC138: 5962-87622.
  • ’ACT138: 5962-87554 Logic Symbols Connection Diagrams Pin Assignment for DIP and Flatpak DS100268-1 IEEE/IEC DS100268-2 Pin Assignment for LCC DS100268-7 Pin Names A0.
  • A2 E1.
  • E2 E3 O0.
  • O7 Descripti.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (54AC138_NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
54ACT11000 QUADRUPLE 2-INPUT POSITIVE-NAND GATES Texas Instruments
54ACT11002 QUADRUPLE 2-INPUT POSITIVE-NOR GATES Texas Instruments
54ACT11010 Triple 3-Input Positive-NAND Gates Texas Instruments
54ACT11011 TRIPLE 3-INPUT POSITIVE-AND GATES Texas Instruments
54ACT11021 DUAL 4-INPUT POSITIVE-AND GATES Texas Instruments

Other Datasheets by National Semiconductor (Texas Instruments)

Part Number Description
54ACT139 Dual 1-of-4 Decoder/Demultiplexer
54ACT109 Dual JK Positive Edge-Triggered Flip-Flop
54ACT112 Dual JK Negative Edge-Triggered Flip-Flop
54ACT151 8-Input Multiplexer
54ACT153 Dual 4-Input Multiplexer

Full PDF Text Transcription

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www.DataSheet4U.com 54AC138 • 54ACT138 1-of-8 Decoder/Demultiplexer August 1998 54AC138 • 54ACT138 1-of-8 Decoder/Demultiplexer General Description The ’AC/’ACT138 is a high-speed 1-of-8 decoder/ demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three ’AC/’ACT138 devices or a 1-of-32 decoder using four ’AC/’ACT138 devices and one inverter.
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