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National Semiconductor Electronic Components Datasheet

74AC10 Datasheet

Triple 3-Input NAND Gate

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March 1993
54AC 74AC10  74ACT10
Triple 3-Input NAND Gate
General Description
The ’AC ’ACT10 contains three 3-input NAND gates
Features
Y ICC reduced by 50% on 54AC 74AC only
Y Outputs source sink 24 mA
Y Standard Military Drawing (SMD)
’AC10 5962-87610
Y For Military 54ACT10 device see the 54ACTQ10
Logic Symbol
IEEE IEC
Connection Diagrams
Pin Assignment
for DIP Flatpak and SOIC
Pin Assignment
for LCC
Pin Names
An Bn Cn
On
TL F 9915–1
Description
Inputs
Outputs
TL F 9915 – 3
TL F 9915 – 2
FACTTM is a trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9915
RRD-B30M75 Printed in U S A


National Semiconductor Electronic Components Datasheet

74AC10 Datasheet

Triple 3-Input NAND Gate

No Preview Available !

Absolute Maximum Ratings (Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI e b0 5V
VI e VCC a 0 5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO e b0 5V
VO e VCC a 0 5V
DC Output Voltage (VO)
DC Output Source
or Sink Current (IO)
DC VCC or Ground Current
per Output Pin (ICC or IGND)
Storage Temperature (TSTG)
Junction Temperature (TJ)
CDIP
PDIP
b0 5V to a7 0V
b20 mA
a20 mA
b0 5V to VCC a 0 5V
b20 mA
a20 mA
b0 5V to VCC a 0 5V
g50 mA
g50 mA
b65 C to a150 C
175 C
140 C
Note 1 Absolute maximum ratings are those values beyond which damage
to the device may occur The databook specifications should be met without
exception to ensure that the system design is reliable over its power supply
temperature and output input loading variables National does not recom-
mend operation of FACTTM circuits outside databook specifications
Recommended Operating
Conditions
Supply Voltage (VCC)
’AC
’ACT
2 0V to 6 0V
4 5V to 5 5V
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
74AC ACT
54AC
0V to VCC
0V to VCC
b40 C to a85 C
b55 C to a125 C
Minimum Input Edge Rate (DV Dt)
’AC Devices
VIN from 30% to 70% of VCC
VCC 3 3V 4 5V 5 5V
Minimum Input Edge Rate (DV Dt)
’ACT Devices
VIN from 0 8V to 2 0V
VCC 4 5V 5 5V
125 mV ns
125 mV ns
DC Characteristics for ’AC Family Devices
Symbol
Parameter
VCC
(V)
VIH Minimum High Level 3 0
Input Voltage
45
55
VIL Maximum Low Level 3 0
Input Voltage
45
55
VOH Minimum High Level 3 0
Output Voltage
45
55
74AC
TA e a25 C
Typ
15
2 25
2 75
15
2 25
2 75
2 99
4 49
5 49
21
3 15
3 85
09
1 35
1 65
29
44
54
54AC
74AC
TA e
TA e
b55 C to a125 C b40 C to a85 C
Guaranteed Limits
21 21
3 15 3 15
3 85 3 85
09 09
1 35 1 35
1 65 1 65
29 29
44 44
54 54
3 0 2 56
4 5 3 86
5 5 4 86
VOL Maximum Low Level 3 0 0 002 0 1
Output Voltage
4 5 0 001 0 1
5 5 0 001 0 1
24
37
47
01
01
01
2 46
3 76
4 76
01
01
01
3 0 0 36
4 5 0 36
5 5 0 36
IIN Maximum Input 5 5
Leakage Current
g0 1
All outputs loaded thresholds on input associated with output under test
05
05
05
g1 0
0 44
0 44
0 44
g1 0
Units
V
V
V
V
V
V
mA
Conditions
VOUT e 0 1V
or VCC b 0 1V
VOUT e 0 1V
or VCC b 0 1V
IOUT e b50 mA
VIN e VIL or VIH
b12 mA
IOH b24 mA
b24 mA
IOUT e 50 mA
VIN e VIL or VIH
12 mA
IOL 24 mA
24 mA
VI e VCC GND
2


Part Number 74AC10
Description Triple 3-Input NAND Gate
Maker National Semiconductor
Total Page 8 Pages
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