1-to-8 minimum skew clock driver.
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These CGS devices implement National’s FACTTM family Ideal for signal generation and clock distribution Guaranteed pin to pin and part to part skew Mu.
The ’2525 is designed to distribute a single clock to eight separate receivers with low skew across all outputs during b.
On the multiplexed clock device the SEL pin is used to determine which CLKn input will have an active effect on the outputs of the circuit When SEL e 1 the CLK1 input is selected and when SEL e 0 the CLK0 input is selected The non-selected CLKn input.
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