CD4012C Overview
Key Specifications
Package: DIP
Operating Voltage: 5 V
Max Voltage (typical range): 15 V
Min Voltage (typical range): 3 V
Description
These NOR and NAND gates are monolithic complementary MOS (CMOS) integrated circuits The N- and P-channel enhancement mode transistors provide a symmetrical circuit with output swings essentially equal to the supply voltage This results in high noise immunity over a wide supply voltage range No DC power other than that caused by leakage current is consumed during static conditions All inputs are protected against static discharge and latching conditions.
Key Features
- Y Y Y Wide supply voltage range Low power High noise immunity 3 0V to 15V 10 nW (typ ) 0 45 VDD (typ )
