DS90CR287 link equivalent, 28-bit channel link.
n n n n n n n n n n n n n 20 to 85 MHZ shift clock support 50% duty cycle on receiver output clock Best
–in
–Class Set & Hold Times on TxINP.
The DS90CR287 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the tr.
Image gallery
TAGS
Manufacturer
Related datasheet
Download (Size : 308.30KB)