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Niko

P3055LDG Datasheet Preview

P3055LDG Datasheet

N-Channel Logic Level Enhancement Mode Field Effect Transistor

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NIKO-SEM
N-Channel Logic Level Enhancement
P3055LDG
Mode Field Effect Transistor
TO-252 (DPAK)
Halogen-Free & Lead-Free
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
25 50mΩ
ID
12A
D
G
S
1. GATE
2. DRAIN
3. SOURCE
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current1
Avalanche Energy
TC = 25 °C
TC = 100 °C
L = 0.1mH
VGS
ID
IDM
EAS
Power Dissipation
TC = 25 °C
TC = 100 °C
Operating Junction & Storage Temperature Range
Lead Temperature (1/16” from case for 10 sec.)
PD
Tj, Tstg
TL
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
Junction-to-Case
RθJC
Junction-to-Ambient
RθJA
Case-to-Heatsink
RθCS
1Pulse width limited by maximum junction temperature.
TYPICAL
1
LIMITS
±20
12
8
45
60
48
20
-55 to 150
275
UNITS
V
A
mJ
W
°C
MAXIMUM
3
75
UNITS
°C / W
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current1
V(BR)DSS
VGS(th)
IGSS
IDSS
ID(ON)
STATIC
VGS = 0V, ID = 250µA
VDS = VGS, ID = 250µA
VDS = 0V, VGS = ±20V
VDS = 20V, VGS = 0V
VDS = 20V, VGS = 0V, TJ = 125 °C
VDS = 10V, VGS = 10V
LIMITS
UNIT
MIN TYP MAX
25
0.8 1.2 2.5
V
±250 nA
25
µA
250
12 A
REV 1.0
1 Feb-19-2009




Niko

P3055LDG Datasheet Preview

P3055LDG Datasheet

N-Channel Logic Level Enhancement Mode Field Effect Transistor

No Preview Available !

NIKO-SEM
N-Channel Logic Level Enhancement
P3055LDG
Mode Field Effect Transistor
TO-252 (DPAK)
Halogen-Free & Lead-Free
Drain-Source On-State
Resistance1
Forward Transconductance1
RDS(ON)
gfs
VGS = 5V, ID = 12A
VGS = 10V, ID = 12A
VDS = 15V, ID = 12A
70 120
mΩ
50 90
16 S
DYNAMIC
Input Capacitance
Output Capacitance
Ciss
Coss VGS = 0V, VDS = 15V, f = 1MHz
450
200
Reverse Transfer Capacitance
Total Gate Charge2
Gate-Source Charge2
Gate-Drain Charge2
Turn-On Delay Time2
Rise Time2
Turn-Off Delay Time2
Fall Time2
Crss
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
VDS = 0.5V(BR)DSS, VGS = 10V,
ID = 6A
VDS = 15V, RL = 1Ω
ID 12A, VGS = 10V, RGS = 2.5Ω
60
15
2.0
7.0
6.0
6.0
20
5.0
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current
IS
12
Forward Voltage1
VSD
Reverse Recovery Time
trr
Reverse Recovery Charge
Qrr
1Pulse test : Pulse Width 300 µsec, Duty Cycle 2%.
2Independent of operating temperature.
IF = IS, VGS = 0V
1.5
30
0.043
pF
nC
nS
A
V
nS
µC
REMARK: THE PRODUCT MARKED WITH “P3055LDG”, DATE CODE or LOT #
REV 1.0
2 Feb-19-2009


Part Number P3055LDG
Description N-Channel Logic Level Enhancement Mode Field Effect Transistor
Maker Niko
Total Page 4 Pages
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