CAT5261 Datasheet PDF (Dual Digital Potentiometer) | Download ON Semiconductor CAT5261

CAT5261 - Dual Digital Potentiometer

Description

8 bytes of NVRAM memory.

Each digital POT consists of a series of resistive elements connected between two externally accessible end points.

Features

Two Linear-taper Digital Potentiometers.
256 Resistor Taps per Potentiometer.
End to End Resistance 50 kW or 100 kW.
Potentiometer Control and Memory Access via SPI Interface.
Low Wiper Resistance, Typically 100 W.
Nonvolatile Memory Storage for up to Four Wiper Settings for Each Potentiometer.
Automatic Recall of Saved Wiper Settings at Power Up.
2.5 to 6.0 Volt Operation.
Standby Current less than 1 mA.

Datasheet Details

Part number	CAT5261
Manufacturer	onsemi
File Size	184.06 KB
Description	Dual Digital Potentiometer
Datasheet	CAT5261 Datasheet

📁 Similar Datasheet

CAT5261 - Dual Digitally Programmable Potentiometers (Catalyst Semiconductor)

CAT5269 - Dual Digitally Programmable Potentiometers (Catalyst Semiconductor)

CAT52045 - Attenuator 5 Section (DAICO Industries)

CAT521 - 8-Bit Digital POT With Independent Reference Inputs (Catalyst Semiconductor)

CAT522 - 8-Bit Dual Digital POT With Independent Reference Inputs (Catalyst Semiconductor)

CAT5221 - Dual Digitally Programmable Potentiometers (Catalyst Semiconductor)

CAT523 - Configured Digitally Programmable Potentiometer (DPP): Programmable Voltage Applications (Catalyst Semiconductor)

CAT524 - Configured Digitally Programmable Potentiometer (DPP): Programmable Voltage Applications (Catalyst Semiconductor)

CAT5241 - Quad Digitally Programmable Potentiometers (Catalyst Semiconductor)

CAT525 - Configured Digitally Programmable Potentiometer (DPP): Programmable Voltage Applications (Catalyst Semiconductor)

Full PDF Text Transcription

Click to expand full text

Dual Digital Potentiometer (POT) with 256 Taps and SPI Interface CAT5261 Description The CAT5261 is two digital POTs integrated with control logic and 8 bytes of NVRAM memory. Each digital POT consists of a series of resistive elements connected between two externally accessible end points. The tap points between each resistive element are connected to the wiper outputs with CMOS switches. A separate 8-bit control register (WCR) independently controls the wiper tap switches for each digital POT. Associated with each wiper control register are four 8-bit non-volatile memory data registers (DR) used for storing up to four wiper settings. Writing to the wiper control register or any of the non-volatile data registers is via a SPI serial bus.

Published: Dec 5, 2016 |