2.5V/3.3V, 3 GHz Dual
Differential Clock/Data 2x2
Crosspoint Switch with
CML Output and Internal
The NB4L858M is a high−bandwidth low voltage fully differential
dual 2 x 2 crosspoint switch with CML outputs that is suitable for
applications such as SDH/SONET DWDM and high speed switching
applications. Design technique minimizes jitter accumulation,
crosstalk, and signal skew which make this device ideal for
loop−through and protection channel switching application. Each
2 x 2 crosspoint switch can fan out and/or multiplex up to 3 Gb/s data
and 3 GHz clock signals.
Differential inputs incorporate a pair of internal 50 W termination
resistors in a center−tapped configuration (VTDx Pins) and can accept
LVPECL (Positive ECL) or CML input signal without any external
component. This feature provides transmission line termination
on−chip, at the receiver end, eliminating external components.
Differential 16 mA CML output provides matching internal 50 W
terminations, and 400 mV output swings when externally terminated,
50 W to VCC.
The SELECT inputs are single−ended and can be driven with either
LVCMOS or LVTTL input levels. The device is housed in a low
profile 7 x 7 mm 32−pin LQFP package.
• Maximum Input Clock Frequency 3 GHz
• Maximum Input Data Frequency 3 Gb/s
• 350 ps Typical Propagation Delay
• 80 ps Typical Rise and Fall Times
• 12 ps Channel to Channel Skew
• 0.5 ps RMS Jitter
• 5 ps Deterministic Jitter @ 2.5 Gb/s
• Operating Range: VCC = 2.3V to 3.6 V with GND = 0 V
• CML Output Level (400 mV Peak−to−Peak Output), Differential
• These are Pb−Free Devices
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G = Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
Figure 1. Functional Block Diagram
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2005
December, 2005 − Rev. 9
Publication Order Number: