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P4C1049 - HIGH SPEED 512K x 8 STATIC CMOS RAM

General Description

The P4C1049 is a 4 Megabit high-speed CMOS static RAM organized as 512Kx8.

The CMOS memory requires no clocks or refreshing, and has equal access and cycle times.

Inputs are fully TTL-compatible.

Key Features

  • High Speed (Equal Access and Cycle Times).
  • 15/20/25 ns (Commercial).
  • 20/25/35 ns (Industrial).
  • 20/25/35/45/55/70 ns (Military) Low Power Single 5V±10% Power Supply Easy Memory Expansion Using CE and OE Inputs Common Data I/O P4C1049/P4C1049L HIGH SPEED 512K x 8 STATIC CMOS RAM Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology Automatic Power Down Packages.
  • 36-Pin Ceramic DIP (600 mil).
  • 36-Pin SOJ (400 mil).
  • 36.

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Datasheet Details

Part number P4C1049
Manufacturer PYRAMID
File Size 717.00 KB
Description HIGH SPEED 512K x 8 STATIC CMOS RAM
Datasheet download datasheet P4C1049 Datasheet

Full PDF Text Transcription for P4C1049 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for P4C1049. For precise diagrams, and layout, please refer to the original PDF.

FEATURES High Speed (Equal Access and Cycle Times) — 15/20/25 ns (Commercial) — 20/25/35 ns (Industrial) — 20/25/35/45/55/70 ns (Military) Low Power Single 5V±10% Power S...

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ial) — 20/25/35/45/55/70 ns (Military) Low Power Single 5V±10% Power Supply Easy Memory Expansion Using CE and OE Inputs Common Data I/O P4C1049/P4C1049L HIGH SPEED 512K x 8 STATIC CMOS RAM Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology Automatic Power Down Packages —36-Pin Ceramic DIP (600 mil) —36-Pin SOJ (400 mil) —36-Pin FLATPACK —36-Pin LCC (452 mil x 920 mil) DESCRIPTION The P4C1049 is a 4 Megabit high-speed CMOS static RAM organized as 512Kx8. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs are fully TTL-compatible. The RAM operates

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