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P4C1024 - HIGH SPEED 128K x 8 DUAL CHIP ENABLE CMOS STATIC RAM

Datasheet Summary

Description

The P4C1024 is a 1,048,576-bit high-speed CMOS static RAM organized as 128Kx8.

The CMOS memory requires no clocks or refreshing, and has equal access and cycle times.

Inputs are fully TTL-compatible.

Features

  • High Speed (Equal Access and Cycle Times).
  • 15/20/25/35 ns (Commercial/Industrial).
  • 20/25/35/45/55/70/85/100/120 ns (Military) Single 5 Volts ±10% Power Supply Easy Memory Expansion Using CE1, CE2 and OE Inputs Common Data I/O Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology.

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Datasheet Details

Part number P4C1024
Manufacturer PYRAMID
File Size 719.15 KB
Description HIGH SPEED 128K x 8 DUAL CHIP ENABLE CMOS STATIC RAM
Datasheet download datasheet P4C1024 Datasheet
Additional preview pages of the P4C1024 datasheet.

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Full PDF Text Transcription

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P4C1024 HIGH SPEED 128K x 8 DUAL CHIP ENABLE CMOS STATIC RAM FEATURES High Speed (Equal Access and Cycle Times) — 15/20/25/35 ns (Commercial/Industrial) — 20/25/35/45/55/70/85/100/120 ns (Military) Single 5 Volts ±10% Power Supply Easy Memory Expansion Using CE1, CE2 and OE Inputs Common Data I/O Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology DESCRIPTION The P4C1024 is a 1,048,576-bit high-speed CMOS static RAM organized as 128Kx8. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs are fully TTL-compatible. The RAM operates from a single 5V±10% tolerance power supply. Access times of 15 nanoseconds permit greatly enhanced system operating speeds. CMOS is utilized to reduce power consumption to a low level.
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