P4C1024 Datasheet
P4C1024 Datasheet (PYRAMID)
PYRAMID
The P4C1024 is a 1,048,576-bit high-speed CMOS static RAM organized as 128Kx8. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs are fully TTL-compatible. .
High Speed (Equal Access and Cycle Times)
* 15/20/25/35 ns (Commercial/Industrial)
* 20/25/35/45/55/70/85/100/120 ns (Military) Single 5 Volts ±10% Power Supply Easy Memory Expansion Using CE1, CE2 and OE Inputs Common Data I/O Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMO.
P4C1024 Datasheet (Unknown Manufacturer)
Unknown Manufacturer
The P4C1024 is a 1,048,576-bit high-speed CMOS static RAM organized as 128Kx8. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs are fully TTL-compatible. .
High Speed (Equal Access and Cycle Times)
* 15/17/20/25/35 ns (Commercial)
* 20/25/35/45 ns (Industrial) Single 5 Volts ±10% Power Supply Easy Memory Expansion Using CE1, CE2 and OE Inputs Common Data I/O Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology Fast tOE A.