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Panasonic Electronic Components Datasheet

MN101E31A Datasheet

8-bit single-chip microcomputers

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MN101E31 Series
8-bit Single-chip Microcontroller
Overview
The MN101E series of 8-bit single-chip microcomputers (the memory expansion version of MN101C series) incorporate
multiple types of peripheral functions. This chip series is well suited for camera, VCR, MD, TV, CD, LD, printer, telephone,
home automation, pager, air conditioner, PPC, fax machine, music instrument and other applications.
This LSI brings to embedded microcomputer applications exible, optimized hardware congurations and a simple efcient
instruction set. The MN101E31 series have an internal 128 KB/64 KB (maximum) of ROM and 6 KB/4 KB(maximum) of
RAM. Peripheral functions include 6 external interrupts, 23 internal interrupts including NMI, 9 timer counters, 5 sets of serial
interfaces, A/D converter, LCD driver, watchdog timer, 1 set of automatic data transfer, synchronous output function and buzzer
output. The conguration of this microcomputer is well suited for application as a system controller in camera, timer selector for
VCR, CD player, or minicomponent.
With three oscillation system (high frequency : max. 10 MHz / low frequency : 32.768 kHz and PLL : frequency multiplier
of high frequency) contained on the chip, the system clock can be switched to high frequency input (high speed mode), PLL
input (PLL mode), or to low frequency input (low speed mode).
The system clock is generated by dividing the oscillation clock. The best operation clock for the system can be selected by
switching its frequency by software. High speed mode has the normal mode which is based on 2-cycle clock (fpll/2) and the
double speed mode which is based on the not-devided clock with fpll.
A machine cycle (min. instructions execution) in the normal mode is 200 ns when fosc is 10 MHz (at the time that PLL is
not used). A machine cycle in the double speed mode is 100 ns when fosc is 10 MHz. A machine cycle in the PLL mode is 50 ns
(maximum).The package is 80-pin, LQFP.
Product Summary
This manual describes the following models of the MN101E31 series. These products have identical functions. Please note that mainly
dealed here is MN101E31G.
Model
ROM Size
RAM Size
Classication
Package
MN101E31G
128 KB
6 KB
MN101E31D
64 KB
4 KB
Mask ROM version
MN101E31A
32 KB
2 KB
LQFP080-P-1414A
MN101EF31G
MN101EF31D
128 KB + 4 KB
64 KB + 8 KB
6 KB
4 KB
Flash EEPROM version
Publication date: February 2012
Ver. HEM
1


Panasonic Electronic Components Datasheet

MN101E31A Datasheet

8-bit single-chip microcomputers

No Preview Available !

MN101E31 Series
Features
ROM Capacity
128 / 64 / 32 Kbyte (MN101EF31G: 128 Kbyte + 4 Kbyte, MN101EF31D: 64 Kbyte + 8 Kbyte)
RAM Capacity
6 / 4 / 2 Kbyte
Package
80pin LQFP (14 mm square, 0.65 mm pitch)
Machine Cycle
High speed mode
0.10 ms / 10 MHz (2.2 V to 5.5 V) (MN101EF31D: 2.7 V to 5.5 V)
PLL mode
0.05 ms / 20 MHz (2.2 V to 5.5 V) (MN101EF31D: 2.7 V to 5.5 V)
Low speed mode
62.5 ms / 32 kHz (2.2 V to 5.5 V) (MN101EF31D: 2.7 V to 5.5 V)
Clock Gear
Operation speed of system clock is variable by changing the frequency.
Multiplied Clock
High-speed frequency clock (fosc) can be multiplied by 2, 3, 4, 5, 6, 8 and 10.
Memory bank
Data memory space is expanded by the bank system.
Bank for the source address/Bank for the destination address.
ROM correction
Correcting address designation : up to 7 addresses possible
Operating Mode
NORMAL mode ( High speed mode)
PLL mode
SLOW mode ( Low speed mode)
HALT mode
STOP mode
(The operation clock can be switched in each mode.)
Operating Voltage
2.2 V to 5.5 V (MN101EF31D: 2.7 V to 5.5 V)
Operating Temperature
-40°C to +85°C
2 Ver. HEM


Part Number MN101E31A
Description 8-bit single-chip microcomputers
Maker Panasonic
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MN101E31A Datasheet PDF






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