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Peregrine Semiconductor

PE4235 Datasheet Preview

PE4235 Datasheet

SPDT UltraCMOS RF Switch DC

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Product Description
The PE4235 RF Switch is designed to cover a broad range of
applications from near DC to 4000 MHz. This single-supply
reflective switch integrates on-board CMOS control logic
driven by a simple, single-pin CMOS or TTL control input.
Using a nominal +3-volt power supply, a 1 dB compression
point of +15 dBm can be achieved. The PE4235 also exhibits
outstanding isolation of better than 40 dB at 1000 MHz and is
offered in a small 3x3 mm DFN package.
The PE4235 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Figure 1. Functional Diagram
RFC
RF1 RF2
Product Specification
PE4235
SPDT UltraCMOS™ RF Switch
DC - 4000 MHz
Features
Single 3.0-volt power supply
Low insertion loss: 0.40 dB at
1000 MHz, 0.45 dB at 2000 MHz
High isolation of 40 dB at 1000 MHz,
30 dB at 2000 MHz
Typical 1 dB compression point of
+15 dBm
Single-pin CMOS or TTL logic control
Available in a 6-lead DFN package
Figure 2. Package Type
6-lead DFN
CMOS
Control
Driver
CTRL
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 )
Parameter
Operating Frequency1
Insertion Loss
Conditions
1000 MHz
2000 MHz
Minimum
DC
Typical
0.40
0.45
Isolation – RFC to RF1/RF2
1000 MHz
2000 MHz
39 40
29 30
Isolation – RF1 to RF2
1000 MHz
2000 MHz
36 37
28 29
Return Loss
1000 MHz
2000 MHz
20 22
17 19
‘ON’ Switching Time
‘OFF’ Switching Time
Video Feedthrough2
Input 1 dB Compression
Input IP3
CTRL to 0.1 dB final value, 2 GHz
CTRL to 25 dB isolation, 2 GHz
2000 MHz
2000 MHz, 5 dBm
13.5
32.5
200
90
2.5
15
36
Notes: 1. Device linearity will begin to degrade below 10 MHz.
2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to
High or High to Low in a 50 test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.
Maximum
4000
0.50
0.60
Units
MHz
dB
dB
dB
dB
dB
dB
dB
dB
ns
ns
mVpp
dBm
dBm
Document No. 70-0069-03 www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 8




Peregrine Semiconductor

PE4235 Datasheet Preview

PE4235 Datasheet

SPDT UltraCMOS RF Switch DC

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Figure 3. Pin Configuration
RF2 1
GND 2
Exposed Solder
Pad - Shorted
to Pin 2
(bottom side)
RF1 3
6 RFC
5 CTRL
4 VDD
Table 2. Pin Descriptions
Pin Pin
No. Name
Description
1 RF2 RF2 port.1
2
GND
Ground Connection. Traces should be
physically short and connected to the
ground plane. This pin is connected to
the exposed solder pad that also must
be soldered to the ground plane for best
performance.
3 RF1 RF1 port.1
4 VDD Nominal 3 V supply connection.
5
CTRL
CMOS or TTL logic level:
High = RFC to RF1 signal path
Low = RFC to RF2 signal path
6
RFC
Common RF port for switch.1
Notes: 1. All RF pins must be DC blocked with an external series
capacitor or held at 0 VDC.
Table 3. DC Electrical Specifications
Parameter
VDD Power Supply Voltage
IDD Power Supply Current
(VDD = 3V, VCNTL = 3V)
Control Voltage High
Control Voltage Low
Min
2.7
0.7xVDD
Typ
3.0
250
Max
3.3
Units
V
500 nA
0.3xVDD
V
V
PE4235
Product Specification
Table 4. Absolute Maximum Ratings
Symbol Parameter/Conditions Min Max Units
VDD Power Supply Voltage
VI
Voltage on any input
except for CTRL pin
-0.3 4.0
-0.3 VDD + 0.3
V
V
VCTRL Voltage on CTRL pin
5V
TST Storage temperature range -65 150
°C
TOP
Operating temperature
range
-40 85
°C
PIN Input power (50 )
19 dBm
VESD
ESD Voltage (Human Body
Model)
200 V
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Control Logic Input
The control logic input pin (CTRL) is typically
driven by a 3-volt CMOS logic level signal. For
flexibility to support systems that have 5-volt
control logic drivers, the control logic input has
been designed to handle a standard 5-volt TTL
control signal. This TTL control signal input must
not exceed 5-volts or damage to the switch could
result.
Table 5. Control Logic Truth Table
Control Voltage
Signal Path
CTRL = CMOS or TTL High
RFC to RF1
CTRL = CMOS or TTL Low
RFC to RF2
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 4.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 8
Document No. 70-0069-03 UltraCMOS™ RFIC Solutions


Part Number PE4235
Description SPDT UltraCMOS RF Switch DC
Maker Peregrine Semiconductor
Total Page 8 Pages
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