Figure 3. Pin Configuration
Pad - Shorted
to Pin 2
Table 2. Pin Descriptions
1 RF2 RF2 port.1
Ground Connection. Traces should be
physically short and connected to the
ground plane. This pin is connected to
the exposed solder pad that also must
be soldered to the ground plane for best
3 RF1 RF1 port.1
4 VDD Nominal 3 V supply connection.
CMOS or TTL logic level:
High = RFC to RF1 signal path
Low = RFC to RF2 signal path
Common RF port for switch.1
Notes: 1. All RF pins must be DC blocked with an external series
capacitor or held at 0 VDC.
Table 3. DC Electrical Specifications
Min Typ Max Units
VDD Power Supply Voltage
IDD Power Supply Current
(VDD = 3V, VCNTL = 3V)
Control Voltage High
Control Voltage Low
Table 4. Absolute Maximum Ratings
Symbol Parameter/Conditions Min Max Units
Power supply voltage
Voltage on any input
Voltage on CTRL input
Storage temperature range -65 150
Input power (50 Ω)
ESD voltage (Human Body
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Control Logic Input
The control logic input pin (CTRL) is typically
driven by a 3-volt CMOS logic level signal. For
flexibility to support systems that have 5-volt
control logic drivers, the control logic input has
been designed to handle a standard 5-volt TTL
control signal. This TTL control signal input must
not exceed 5-volts or damage to the switch could
Table 5. Control Logic Truth Table
CTRL = CMOS or TTL High
CTRL = CMOS or TTL Low
RFC to RF1
RFC to RF2
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 4.
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 8
Document No. 70-0071-03 │ UltraCMOS™ RFIC Solutions