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Peregrine Semiconductor

PE42556 Datasheet Preview

PE42556 Datasheet

SPDT RF Switch

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Product Description
The PE42556 RF switch is designed for use in Test/ATE,
cellular and other wireless applications. This broadband
general purpose switch maintains excellent RF
performance and linearity from 9 kHz through
13500 MHz. The PE42556 integrates on-board CMOS
control logic driven by a single-pin, low voltage CMOS
control input. It also has a logic select pin which enables
changing the logic definition of the control pin. Additional
features include a novel user defined logic table, enabled
by the on-board CMOS circuitry. The PE42556 also
exhibits excellent isolation of 26 dB at 13500 MHz, fast
settling time, and is offered in a tiny Flip Chip package.
The PE42556 is manufactured on Peregrine’s
UltraCMOS® process, a patented variation of silicon-on-
insulator (SOI) technology on a sapphire substrate,
offering the performance of GaAs with the economy and
integration of conventional CMOS.
Product Specification
PE42556 Flip Chip
UltraCMOS® SPDT RF Switch
9 kHz - 13500 MHz
Features
 HaRP™ technology enhanced
 Eliminates gate lag
 No insertion loss or phase drift
 Fast settling time
 Next Gen 0.25 μm process technology
 Single-pin 3.3V CMOS logic control
 High isolation: 26 dB@ 13.5 GHz
 Low insertion loss: 1.7 dB @ 13.5 GHz
 P1dB: 33 dBm typical
 Return loss: 13 dB @ 13.5 GHz (typ)
 IIP3: +56 dBm typical
 High ESD: 4kV HBM
 Absorptive switch design
 Flip Chip packaging
Figure 1. Functional Diagram
Figure 2. Die Photo (Bumps Up)
Flip Chip Packaging
71-0031
Document No. 70-0289-06 www.psemi.com
©2009-2012 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 10




Peregrine Semiconductor

PE42556 Datasheet Preview

PE42556 Datasheet

SPDT RF Switch

No Preview Available !

PE42556
Product Specification
Table 1. Electrical Specifications: Temp = 25°C, VDD = 3.3V
Parameter
Conditions
Operation Frequency
Insertion Loss
Isolation – RF1 to RF2
Isolation – RFC to RF1
Isolation – RFC to RF2
Return Loss
Settling Time
Switching Time
Input 1 dB
Compression 1,2
Input IP3 1
9 kHz - 10 MHz
10 - 3000 MHz
3000 - 7500 MHz
7500 - 10000 MHz
10000 - 13500 MHz
9 kHz - 10 MHz
10 - 3000 MHz
3000 - 7500 MHz
7500 - 10000 MHz
10000 - 13500 MHz
9 kHz - 10 MHz
10 - 3000 MHz
3000 - 7500 MHz
7500 - 10000 MHz
10000 - 13500 MHz
9 kHz - 10 MHz
10 - 3000 MHz
3000 - 7500 MHz
7500 - 10000 MHz
10000 - 13500 MHz
9 kHz - 10 MHz
10 - 3000 MHz
3000 - 7500 MHz
7500 - 10000 MHz
10000 - 13500 MHz
50% CTRL to 0.05 dB final value (-40 to +85 °C) Rising Edge
50% CTRL to 0.05 dB final value (-40 to +85 °C) Falling Edge
50% CTRL to 90% or 10% of final value (-40 to +85 °C)
13500 MHz
13500 MHz
Input IP2 1
13500 MHz
Notes:
1. Linearity and power performance are derated at lower frequencies (< 1 MHz)
2. Please refer to Maximum Operating Pin (50) in Table 3
Min
9 kHz
76.5
43.5
30.0
24.0
15.5
72.5
39.0
31.5
27.0
21.5
75.5
39.5
31.5
27.5
21.0
Typical
0.85
0.92
0.98
1.07
1.74
88.5
46.0
31.5
25.5
17.5
84.0
40.5
33.0
30.5
26.5
87.0
41.0
33.0
30.5
26.0
22.5
22.0
17.0
16.0
13.0
8.5
9.5
3.3
Max
13500 MHz
0.93
1.06
1.23
1.41
2.65
10.0
13.5
4.0
Units
As shown
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
µs
µs
µs
33 dBm
56
107.5
dBm
dBm
©2009-2012 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 10
Document No. 70-0289-06 UltraCMOS® RFIC Solutions


Part Number PE42556
Description SPDT RF Switch
Maker Peregrine Semiconductor
Total Page 10 Pages
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